Detecting Hidden Voids under HBM BGA Packages Using 3D X-Ray AXI

Opening Introduction

If you are managing SMT lines for high-performance computing (HPC) or AI accelerator cards right now, you already know the stakes. Assembling a board with standard consumer components is one thing. But when a single assembly involves mounting an expensive GPU baseboard alongside multiple stacks of High-Bandwidth Memory (HBM), the word “rework” becomes a multi-thousand-dollar nightmare.
With HBM architectures transitioning into wider interfaces and denser microbump arrays, the biggest headache we are seeing on the shop floor isn’t part placement—it’s hidden solder voiding.
When dealing with pitch sizes closing in on fine limits, 2D X-ray systems simply cannot tell you the whole story. To prevent premature field failures and maintain high yields, 3D Automated X-ray Inspection (AXI) using computed tomography has become mandatory.
Here is a breakdown of why voids under HBM BGA packages occur, why traditional inspection fails, and how we leverage 3D AXI to isolate these defects before they ship.

Why Solder Voids are Fatal for HBM Interconnects

Solder voiding—small pockets of gas trapped inside the solder joint during the reflow process—is nothing new. However, the physical and thermal profile of HBM makes them uniquely dangerous.

Unlike a standard desktop CPU, an AI accelerator with HBM draws hundreds of amps of current. Hundreds of the BGA pins are dedicated exclusively to power delivery.

When a void forms inside a joint, it causes two immediate problems:

  • Current Crowding: The void reduces the effective cross-sectional area of the solder ball. This forces the electrical current to crowd into the remaining copper/solder interface, spiking localized electrical resistance.
  • Thermal Hotspots: Solder is an excellent thermal conductor; air trapped inside a void is not. Because HBM stacks are highly sensitive to thermal degradation, a cluster of micro-voids under a power pin blocks heat dissipation, leading to a localized thermal runaway that can crack the silicon or burn out the substrate.

While standard IPC-7095 guidelines permit up to 25% voiding by area for generic BGAs, most tier-one AI hardware OEM specifications now restrict voiding to less than 10% to 15% on critical HBM power and signal pins.

The Blind Spot of 2D X-Ray Inspection

Many assembly shops still rely on traditional 2D transmission X-ray systems. While 2D X-ray works fine for basic PCB configurations, it is completely blind when analyzing HBM assemblies on high-layer count boards.
When you look at an AI board via 2D X-ray, you are looking at a flat projection. The image superimposes everything in the vertical path: the massive heat sinks, the heavy internal copper layers (often 20 to 32 layers deep), the component’s internal wire bonds, and the double-sided SMT components.
[2D X-Ray Visual Path] -> Overlaps Heat Sink + Top Side BGA + PCB Copper + Bottom Side Components
[3D AXI Visual Path] -> Slices directly into the 10μm to 50μm Solder Joint Layer Only

Because of this overlapping data, you cannot accurately calculate the volumetric void percentage of a single microbump. A defect hidden at the interface between the microbump and the pad looks exactly like a benign shadow from an internal trace.

How 3D AXI (Computed Tomography) Separates the Layers

3D Automated X-ray Inspection solves the overlap problem by taking hundreds of 2D oblique-angle images as the X-ray source and detector rotate around the board. Advanced reconstruction software then pieces these images together into a virtual 3D model, allowing quality control engineers to digitally “slice” through the PCBA at specific Z-axis heights.
For HBM package inspection, we typically analyze three distinct slices:
Inspection Layer (Z-Axis) What We Are Looking For Critical Defects Identified
Package Interface (Top) Quality of the bump connection to the HBM substrate. Head-in-Pillow (HiP) defects, micro-voids from flux outgassing.
Solder Ball Bulk (Middle) Total volume and distribution of trapped gas. Volumetric voiding %, asymmetric ball deformation.
Pad Interface (Bottom) Intermetallic Compound (IMC) layer wetting on the PCB pad. Pad cratering, non-wet open circuits, Via-in-Pad (VIPPO) outgassing voids.

Identifying the Root Cause: Via-in-Pad Outgassing

By using 3D AXI to view the bottom slice (the pad interface), we frequently catch voids caused by via-in-pad structures (VIPPO). If the epoxy fill inside the drilled via has tiny micro-voids or wasn’t cured completely, the heat during reflow forces that trapped air to expand. It pushes upward through the copper capping plate and escapes directly into the molten solder ball, creating a massive, centralized void that compromises the joint’s mechanical integrity.

Optimizing the Reflow Profile for Lower Voiding Rates

If your 3D AXI data shows a sudden spike in HBM voiding percentages, the fix usually lies in tweaking your reflow oven parameters rather than blaming the pick-and-place accuracy.

  • Extend the Soak Time: Giving the assembly a slightly longer soak zone (typically between 150°C and 200°C) allows the volatile solvents in the solder paste flux to completely gas out before the alloy reaches liquidus temperature.
  • Vacuum Reflow Technology: For the most critical high-density HBM projects, passing the boards through a vacuum-assisted reflow oven while the solder is molten draws the bubbles out of the joints instantly, consistently bringing void rates down to under 5%.

Conclusion: Building a Defect-Free Process Window

As chip sizes continue to exceed 80mm x 80mm and ball pitches shrink below 0.5mm, you can no longer pass boards based on “looks good enough” 2D imaging. 3D AXI turns what used to be a physical blind spot under the HBM stack into a highly traceable, measurable process window.

By integrating inline 3D X-ray inspection right after the reflow stage, you aren’t just catching defects—you are gathering the precise volumetric data needed to adjust your stencil designs, paste volumes, and thermal profiles in real-time.

Do you need help optimizing your next high-density SMT layout?

Our engineering team specializes in advanced DFM (Design for Manufacturing) reviews for AI hardware, high-layer count servers, and fine-pitch BGA assemblies. Contact our technical sales team today to discuss your project requirements or request an X-ray inspection capability report.

About US

Founded in 2012, JKRGLO strives to build a one-stop platform for the electronic industry chain. By integrating PCB manufacturing, component procurement and PCB assembly services, we enable digital PCBA processing. With increasing investment in innovation and digital systems, we have achieved rapid growth and emerged as a leading PCB and PCBA manufacturer in the industry, capable of rapidly producing high-reliability and cost-effective products.
 

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